Keyence IV Series User Manual download pdf (Page 42)

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- IV Series User’s Manual (Field Network) -

Data allocation in the cyclic communication

Output Assembly parameter details



Output Assembly Address 0 to 1: Control request

The Bits at Address 0 to 1 of the Output Assembly have the following functions:

Address Bit Item Content Data content

0 Trigger request Requests the external trigger. 0 : OFF 1 : ON

Master image registration

request

Requests a master image

registration.

0 : OFF 1 : ON

Program switching

request

Requests a program switching. 0 : OFF 1 : ON

3 Warning clear request Requests a warning clear. 0 : OFF 1 : ON

4 Statistics reset request Requests a statistics reset. 0 : OFF 1 : ON

5 Buffer clear request Requests a buffer clear. 0 : OFF 1 : ON

6 to 7 Reserved by system --- ---

1 0 to 7 Reserved by system --- ---

The following will occur when a buffer clear is requested:



If handshake control is [Enabled]



The current status result will be cleared.



The status result in the buffer will be cleared.



The result available bit will become OFF (0).



The number of remaining buffers will become “10”.



If the handshake control is [Disabled]



The current status result will be cleared.



The result available bit will become OFF (0).



If you are switching programs using the EtherNet/IP communication, set the [Switching method] option

to [Monitor/PC]. For details of the setting, refer to the “IV Series User’s Manual (Monitor / PC Software)”.



Buffer overrun and warning statuses will not be cleared even if you execute a buffer clear request.

Cyclic communication

1 2 ... 37 38 39 40 41 42 43 44 45 46 47 ... 109 110

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Keyence IV Series User Manual Page 42

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